Researchers

TAKEUCHI Yoshinori

Faculty	Department of Electrical, Electronic and Communication Engineering / Graduate School of Science and Engineering
Researchmap	https://researchmap.jp/read0008831

- 1987 , Tokyo Institute of Technology, Faculty of Engineering,
- 1987 , Tokyo Institute of Technology, School of Engineering,
- 1992 , Tokyo Institute of Technology, Graduate School, Division of Science and Engineering,
- 1992 , Tokyo Institute of Technology, Science of Engineering,

2018 - Today , Kindai University Faculty of Science and Engineering 教授
2007 - 2017 , Osaka University Graduate School of Information Science and Technology 准教授
2002 - 2006 , Osaka University Graduate School of Information Science and Technology 助教授
1999 - 2002 , : 大阪大学大学院基礎工学研究科助教授
1997 - 1999 , : 大阪大学大学院基礎工学研究科講師
1996 - 1999 , : Osaka University, Assistant Professor,
1996 - 1997 , : 大阪大学基礎工学部講師
1992 - 1996 , : 東京農工大学工学部助手
1992 - 1996 , : Tokyo University of Agriculture and technology, Research Assistant,

Informatics , Computer systems
Informatics , High-performance computing
Manufacturing technology (mechanical, electrical/electronic, chemical engineering) , Control and systems engineering
Manufacturing technology (mechanical, electrical/electronic, chemical engineering) , Communication and network engineering

Computer Architecture, Embedded Systems, SoC Design, Design Automation, VLSI Design Methodology, VLSI Design, Signal Processing

CODEC system using EG2C chips and power control with a sleep mode for a visual prosthesis
Naoya Tanaka; Shogo Hirayama; Yoshinori Takeuchi
The 25th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2024) , 335-340, Mar. 2024 , Refereed
Multiple regression analysis considering multicollinearity for;estimating CPU;cycles using performance counters
Ryota Hattori; Yoshinori Takeuchi
The 25th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2024) , 101-106, Mar. 2024 , Refereed
カスタム命令追加設計支援環境を用いた自然対数演算のためのRISC-V プロセッサの設計
中井智哉; 武内良典
DAシンポジウム2024論文集 2024 , 128-133, Mar. 2024

論理回路 , 今井正治; 武内良典; 東野輝夫; 橋本昌宜 , オーム社 , Nov. 2016
"ASIP Meister,"Processor Description Languages,Prabhat Mishra and Nikil Dutt, eds. , Yuki Kobayashi; Yoshinori Takeuchi; Masaharu Imai , Springer , Jun. 2008
"Dynamic Reconfigurable Architecture Exploration based on Parameterized Reconfigurable Processor Model,"VLSI-SoC: Research Trends in VLSI and Systems on Chip,Giovanni De Micheli, Salvador Mir, Ricardo Reis, eds, , Ittetsu TANIGUCHI; Keishi SAKANUSHI; Kyoko UEDA; Yoshinori TAKEUCHI; Masaharu IMAI , Springer , Dec. 2007

Challenges for Processor Instruction Extension in MPSoC Era , Yoshinori Takeuchi , 19th International Forum on MPSoC for Software-defined Hardware 2019 (MPSoC 2019) , 10, Jul. 2019
Coding Analysis for Spiking Neural Network Models , TAKEUCHI Yoshinori , 18th International Forum on MPSoC for Software-defined Hardware 2018 , 2, Aug. 2018

RISC-Vのカスタム命令を用いた自然対数演算 , 中井智哉; 吉澤翔悟; 武内良典 , 2024年電子情報通信学会総合大会 , A-6-01 , Mar. 2024
SNNシミュレーションにおけるCUDA生成フレームワークGeNNのGPUスレッド数の実行時間への影響 , 有山響; 武内良典 , 024年電子情報通信学会総合大会 , D-2-07 , Mar. 2024
脳皮質刺激型人工視覚システムにおける刺激位置情報に対する時空間特性を利用した圧縮手法の提案 , 杉浦友紀; YU Jaehoon; 武内良典 , 電子情報通信学会技術研究報告 , 117 , 480(DC2017 89-106) , 2018

2019, IPSJ, IPSJ Transactions on System LSI Design Methodology, Best Paper Award
2016, 情報処理学会組込みシステム研究会, 優秀論文賞
2011, The Institute of Electronics Engineers of Korea, The IEEK Semiconductor & Device Society paper award

Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (A), 網膜と視覚野の情報処理と通信に学んだ脳刺激型人工視覚の開発 , 福井工業大学
Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research, Study for Low Energy Information Sensing for IoT Devices
Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research, Hardware-oriented Algorithms and Implementation Methodology for Object Recognition , Osaka University